First published by Altera

line_new_field-configurableSoftware-defined radio (SDR) is by now a grizzled veteran in the dusty waiting room of next big things. Apart from some deployments in battlefield radios, electronic countermeasures, and small-cell cellular base stations, it remains a great idea awaiting its chance at the big time.

But advances in radio-frequency (RF) semiconductors and in computational accelerators are poised to dramatically lower the cost of SDR hardware, simplify the software part of the equation, and consequently open new applications at lower price points. These opportunities range from the current next big thing—the Internet of Things (IoT)—to low-cost reconfigurable radios for developing countries, to open platforms for hobbyists.

The advances are targeting key cost points in SDR architectures. One way to organize their discussion is to examine the elements most SDR implementations have in common, and to see how technology change is impacting them.

Into the Baseband

Starting from the end-user’s point of view, the first major block in an SDR system is the programmable baseband processor. This block was actually the point of inception for the entire concept. In it, computational circuits perform the necessary functions to transform outgoing data into a modulated waveform in the baseband frequency range, and to transform an incoming digitized baseband waveform into received data.

The SDR concept is simple: if you are just processing digital data, do the work on a programmable processor such as a digital signal processor (DSP) instead of in fixed hardware. Then you can change the filters, modulation schemes, error-correction algorithms, and packet or stream protocols by just changing the software executing on the processor.

This is a powerful concept, but it proved a bit optimistic. Programmable engines that could meet the demands of increasing algorithm complexities, data rates and baseband frequencies needed to be very powerful: banks of the fastest DSP chips, for example, or high-end FPGAs. This reality put high minimums on the cost of the baseband processor, its mobility, and its ease of programming.

Into the RF

The baseband processor turned out to be not the only challenge in the SDR concept. The next step in the signal chain is data conversion: digital-to-analog for the transmitter, and analog-to-digital for the receiver, with accompanying analog filters. Then there must be up- and down-converters to shift the signal between baseband and RF, more filters, and amplifiers: perhaps a pre-driver on the transmit side, and certainly a low-noise amplifier (LNA) on the receiver. Finally, there are components that are usually on separate dice, implemented in different process technologies: power amplifiers (PA), antenna filters, and antenna switches.

The problem with these RF analog and mixed-signal components is that they are not inherently programmable—they are traditionally implemented with fixed-function RF-analog components. So while you could change the baseband function of the SDR by changing the software, changing the carrier frequency or the bandwidth of the radio meant changing out or duplicating hardware components.

Clever designers devised solutions—tunable oscillators, adjustable filters, and variable-gain amplifiers—that you could alter by loading registers that in turn manipulated the analog paths. But these techniques generally worked over only a limited range—the bandwidth and linearity necessary to make a broadly-adjustable analog component were really expensive in cost and power. So a multiband, continuously-tunable SDR was likely to need multiple sets of RF signal paths, all the way from the local oscillator to the antenna.

This limitation presented cost, space, and power problems in many potentially high-volume applications. For some specific applications like cognitive radio, in which signals can occur anywhere across a broad spectrum, the need for multiple RF chains could be disabling.

Despite the challenges of huge baseband computing loads and multiple RF transceivers, SDR clearly worked. It worked in high-value military and first-responder applications in the developed world, where the alternative was a suitcase—or a rack—full of different single-function radios. It worked in commercial applications where the number of protocol, modulation, and band combinations was limited and known in advance. But a universe of other opportunities waited.

Attacking the Cost Points

Clearly there are potentially large markets that could open in response to a low-cost SDR platform. Recognizing this, the industry has launched a two-pronged attack on the cost problem. One prong has sought more cost-effective implementations of the programmable baseband processor. The other prong has pursued a unified, wide-band configurable RF transceiver.

The baseband problem has proved the more tractable of the two. Early work by venture companies such as PicoChip—later acquired by Mindspeed Technologies and passed to Intel—demonstrated that a moderately-large array of simple DSP engines could very efficiently support baseband processing for a small-cell base station.

More recently, two other architectural approaches have shown good results, both based on the notion of general-purpose CPU cores augmented by computational accelerators. When the SDR is to span a relatively restricted range of modulation schemes and protocols, high-end microcontrollers with communications-oriented accelerators have shown surprising capabilities. For example it is possible to implement an LTE baseband using a Freescale QorIQ MCU.

Without a-priori restrictions on baseband requirements, design teams have used the same underlying architecture, but with the accelerators implemented in an FPGA. The big news is that process and integration advances have brought these designs within the range of reasonably-priced small-system FPGAs, with or without integrated CPU cores.

“If, for example, you need to support a range of OFDM LTE requirements, your baseband processor is probably going to need acceleration for fast Fourier transforms and turbo coding, as well as offload for the protocol stack,” explained Ebrahim Bushehri, CEO of Lime Microsystems. “Depending on the range of things you are doing, you can implement these in general-purpose DSP chips, in an FPGA, or in an ASIC SoC. The FPGA alternative gives you the flexibility to experiment and explore different air interfaces. And it ensures that you can have the correct hardware interface for your data converters.”

Tackling the Transceiver

There are solutions for a software-defined baseband—enough of them to allow system architects flexibility in trading-off design effort versus range of capabilities. But the transceiver problem remains a key issue: you can’t reach low cost if you need a separate RF signal chain for each band you need to cover.

Ideally the entire signal path in both directions between the antenna and the baseband interface would be so wide-band and linear over its entire range that designers could select any window they wished across the relevant RF spectrum merely by setting the local-oscillator driving the mixer and tuning a few filter parameters at RF to achieve the required selectivity. We are not there yet, but we are getting closer.

Bushehri enumerated the critical signal-path components that must be considered (Figure 2). On the transmit side, there is a baseband digital-to-analog converter (DAC), a variable-gain amplifier (VGA), an adjustable low-pass filter, a wide-band mixed with attendant phase-locked loops (PLL) and local oscillator, and a second VGA, a PA, and an antenna switch. For most modulation schemes everything up to the mixer must be duplicated: one path for the in-phase (I), and one path for the quadrature (Q) signal. On the receive path, coming off the antenna switch you have an RF filter, an LNA, a mixer assembly, and then I and Q paths comprising VGAs, low-pass filters, and the ADCs.

In a fixed-purpose design, every element in these paths would be optimized around its design center. And you can do the same optimizations for an SDR that is intended to operate on a small set of closely-related frequencies and modulation schemes. But an open-ended SDR design, able to adapt to whatever the environment throws at it, must be far more demanding of its RF hardware.

Fortunately, CMOS RF process improvements and increasing sophistication in digitally-assisted analog and RF design have gone a long way toward meeting these needs, Bushehri says. He points, for example, to a recently-announced Lime device, the LMS7002M field-programmable RF transceiver IC. A 65 nm RF CMOS chip, the device provides most of a 50 MHz to 3.8 GHz signal path for a 2 x 2 multiple-input multiple-output (MIMO) software-defined transceiver (Figure 1).

Demands on the individual blocks are sobering. The PLLs, mixers, RF VGAs, and LNAs must be essentially flat and low-noise over the full 3.75 GHz bandwidth, and linear enough to support demanding use models including multi-carrier operation. “The RF circuit design is quite aggressive,” Bushehri allows. In one place, advanced process technology and strong design skills still can’t achieve a single wide-band component. The chip uses multiple voltage-controlled oscillators to cover the frequency range, but with only a single PLL each for transmit and receive.

The portions of the transceiver design that operate at baseband frequency are in their own way equally demanding. In order to support the range of applications Lime envisions, the on-chip baseband blocks—the converters, VGAs, and programmable filters—must support bandwidths from 100 kHz to 108 MHz. This is no trivial specification for, especially, the programmable low-pass filters and the 12 bit data converters, especially when you add in the requirement for low power consumption.

A number of other provisions extend the range of the chip. Most of the functional blocks can be bypassed, allowing designers to substitute a more specialized external component into the signal path if necessary. Lime also integrates multiply-accumulator blocks into digital ends of the baseband paths to offload high-performance digital filters from the baseband digital hardware. And the chip includes an integrated 8051 MCU core to provide a level of abstraction between the control software and the internal registers.

External Components

The wideband programmable transceiver solves a lot of the design challenge. But there are still the RF antenna filter, switch, and PA to be dealt with. Of these, the most obvious issue is the PA. But Bushehri says there are commercial wide-band PAs available that can match the transceiver’s bandwidth, or for more specific applications the chip provides multiple driver outputs, so the user can connect multiple PAs tuned to different bands.

There are antenna switches that can approach 3.8 GHz with reasonable insertion loss and isolation figures. So perhaps the main challenge left to the user is to work out a tunable RF filter to achieve the required receiver selectivity.

Taken together, programmable baseband processors with DSP acceleration, programmable RF signal paths, and careful selection of external components can pack a highly flexible SDR onto a small board at an attractive cost. This opens a range of interesting possibilities for system developers.

At the least, the technology makes it possible for manufacturers to serve a number of wireless markets—say, in various kinds of IoT hubs—from a single hardware design, perhaps with a few parts variations. More interestingly, a system developer could produce a single box—say, a femtocells or white-space transceiver—that could be quickly initialized to fit into any of a wide range of known field environments.

At the extreme, the technology brings fully cognitive radio—able to scan, interpret, and respond to signals from across a broad spectrum and range of uses—within the price of emergency responders and service-providers in the developing world, where capital is dear and locations needing service may be remote and utterly without infrastructure. Such capabilities could be entirely game-changing in the developing world.

Also, a low price point could open a serious hobbyist market for cognitive radio. Not only would this increase designers’ familiarity with the concepts, but it could ignite the kind of open-system innovation that has boosted previous technologies, from amateur radio to embedded computing and robotics. The implications of an open community for cognitive radio are not obvious, but they could be vast.

– See more at: http://www.altera.com/technology/system-design/articles/2014/software-defined-radio-openradio.html?GSA_pos=1&WT.oss_r=1&WT.oss=ron%20wilson%20Lime%20microsystems#sthash.lja6uuIl.dpuf